2019
Xinxin Wang, Qiwen Wang, Seung Hwan Lee, Fan-Hsuan Meng, Wei D Lu, “A Deep Neural Network Accelerator Based on Tiled RRAM Architecture,” 2019 IEEE International Electron Devices Meeting (IEDM), 14.4. 1-14.4. 4. 2018
Jong Hoon Shin, Yeon Joo Jeong, Mohammed A Zidan, Qiwen Wang, Wei D Lu, “Hardware Acceleration of Simulated Annealing of Spin Glass by RRAM Crossbar Array,” 2018 IEEE International Electron Devices Meeting (IEDM), 3.3. 1-3.3. 4. F Cai, WD Lu, “Feature extraction and analysis using memristor networks,” Circuits and Systems (ISCAS), 2018 IEEE International Symposium on, 1-4. MA Zidan, WD Lu, “RRAM fabric for neuromorphic and reconfigurable compute-in-memory systems,” Custom Integrated Circuits Conference (CICC), 2018 IEEE, 1-8. 2017
F Cai, WD Lu, “Epsilon-greedy strategy for online dictionary learning with realistic memristor array constraints,” 2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 17), 19-20. MA Zidan, YJ Jeong, WD Lu, “Hybrid neural network using binary RRAM devices,” 2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 17), 81-82. 2016
W Ma, F Caí, C Du, Y Jeong, M Zidan, WD Lu, “Device nonideality effects on image reconstruction using memristor arrays,” Electron Devices Meeting (IEDM), 2016 IEEE International, 16.7. 1-16.7. 4. CH Liu, YC Chang, F Cai, MB Lien, D Zhang, W Lu, TB Norris, Z Zhong, “High responsivity graphene-SOI heterojunction photodetectors and imaging array,” Lasers and Electro-Optics (CLEO), 2016 Conference on, 1-2. J Lee, E Kioupakis, W Lu, “Oxygen vacancies in amorphous-Ta2O5 from first-principles calculations,” APS March Meeting Abstracts (2016). 2015
P. Sheridan, W.D. Lu, “Defect considerations for robust sparse coding using memristor arrays,” Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH’15), pp. 137-138. “Efficient in-memory computing architecture based on crossbar arrays”, Bing Chen, Fuxi Cai Wen Ma and Wei D. Lu, Electron Devices Meeting (IEDM), 2015 IEEE International, accepted. “Characterizations and Understanding of Conducting Filaments in Resistive Switching Devices”, Yuchao Yang#, Wei D. Lu, 15th International Conference on Nanotechnology, IEEE (IEEE Nano), July 2015 (invited). “Defect Considerations for Robust Sparse Coding Using Memristor Arrays,” Patrick Sheridan and Wei D. Lu, IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 15), Boston, MA, July 2015. “FPAA/Memristor Hybrid Computing Infrastructure,” Mika Laiho, Jennifer O Hasler, Jiantao Zhou, Chao Du, Wei Lu, Eero Lehtonen, Jussi H Poikonen, Circuits and Systems (ISCAS), 2015 IEEE International Symposium on, 62, 906-915. 2014
“3D-stackable crossbar resistive memory based on Field Assisted Superlinear Threshold (FAST) selector,” SH Jo, T Kumar, S Narayanan, WD Lu, H Nazarian, Electron Devices Meeting (IEDM), 2014 IEEE International, 6.7. 1-6.7. 4 (2014) “Pattern recognition with memristor networks,” P Sheridan, W Ma, W Lu, Circuits and Systems (ISCAS), 2014 IEEE International Symposium on, 1078-1081 “Memristive devices for stochastic computing”, S Gaba, P Knag, Z Zhang, W Lu, Circuits and Systems (ISCAS), 2014 IEEE International Symposium on, 2592-2595 “Analog signal processing on a FPAA/memristor hybrid circuit”, M Laiho, E Lehtonen, JO Hasler, J Zhou, C Du, W Lu, JH Poikonen, Circuits and Systems (ISCAS), 2014 IEEE International Symposium on, 2265-2268 2012
“Modeling and implementation of oxide memristors for neuromorphic applications”, Ting Chang, Patrick Sheridan, and Wei Lu. International Workshop on Cellular Nanoscale Networks and their Applications, 2012. (invited) “Memristive analog arithmetic within cellular arrays”, Mika Laiho, Eero Lehtonen, Wei Lu, 2012 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2665-2668, May 2012. “Improvement of RRAM Device Performance Through On-Chip Resistors”, Siddharth Gaba, Shinhyun Choi, Patrick Sheridan, Ting Chang, Yuchao Yang, Wei Lu, MRS Proceedings, 1430, pp. 177-182, April 2012. 2011
“Time-Dependency of the Threshold Voltage in Memristive Devices”, E. Lehtonen, J. Poikonen, M. Laiho, and W. Lu, ISCAS 2011, Rio, June 2011. “Ultrafast Optical-Pump Terahertz-Probe Spectroscopy of Oriented Ge and Ge/Si Core/Shell Nanowires”, Momchil T Mihnev, Wayne Fung, Wei Lu, Theodore B Norris, Quantum Electronics and Laser Science Conference, May 2011. “Two-Terminal Resistive Switches (Memristors) for Memory and Logic Applications”, W. Lu, K.-H. Kim, T. Chang, and S. Gaba, 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011, Tokyo, January 2011, (invited). 2010
“Si Memristive Devices Applied to Memory and Neuromorphic Circuits”, Wei Lu, The IEEE International Symposium on Circuits and Systems, ISCAS 2010, Paris, June 2010, pp. 3333.1 (invited) 2009
“Nanowire Based Electronics: Challenges and Prospects”, International Electronic Device Meeting (IEDM), December 2009. (invited) “Experimental, Modeling and Simulation Studies of Nanoscale Resistance Switching Devices”, Sung Hyun Jo, Kuk-Hwan Kim, Ting Chang, Siddharth Gaba and Wei Lu, IEEE Nano 2009: the 9th International Conference on Nanotechnology, Genoa, Italy, July 2009. “Megahertz Frequency Characterization of Transparent Nanowire-based Thin-film Transistors”, Eric N. Dattoli, Kuk-Hwan Kim, Seok-Youl Choi, and Wei Lu, IEEE NMDC 2009: IEEE Nanotechnology Materials and Devices Conference 2009, Traverse City, June 2009. (invited) 2008
“Nanowire Devices and Their Applications to Displays”, E. N. Dattoli, K. H. Kim, and W. Lu, 15th Annual Symposium on Vehicle Displays, D Society for Information Display, Dearborn, October 2008. (invited) “Si-Based Two-Terminal Resistive Switching Nonvolatile Memory”, S. Jo and W. Lu, Proceedings of IEEE-ICSICT 08, The 9th International Conference on Solid-State and Integrated-Circuit Technology, Beijing, October 2008. 20-23 Oct. 2008 pp. 913 – 916. (invited) “Nanowire-Based High Speed Transparent and Flexible Thin-Film Transistor Devices”, E. N. Dattoli, K. Baler, W. Lu, Proceedings of MicroNano08, MicroNano2008-70328, Hong Kong, June 2008. 2007
“Nonvolatile Resistive Switching Behavior in Metal/Amorphous Silicon/Cristalline Silicon Junctions,” S. Jo, and W. Lu, Mat. Res. Soc. Proc., April 2007, vol. 997, pp. 153-158. “Versatile Metal Oxide Nanowire Devices Achieved via Controlled Doping,” E. N. Dattoli, Q. Wan and W. Lu, Mat. Res. Soc. Proc., April 2007, 1018-EE11-06. 2006
“Ag/a-Si:H/c-Si Resistive Switching Nonvolatile Memory Devices,” S. Jo, and W. Lu, IEEE NMDC 2006: IEEE Nanotechnology Materials and Devices Conference 2006, Proceedings, vol. 1. pp. 116-117, October 2006, Gyeongju, Korea. 2005
“Real-Time Electron Counting Studies on Charge Fluctuations in a Semiconductor Quantum Dot”, W. Lu, Proc. SPIE, May 2005, 5843: 124-140. (invited)